Semiconductor materials with nanometre length-scale, for example recently adopted fin-FET Si transistors or emerging two-dimensional semiconductors, provide attractive paths for the continuous miniaturisation and development of next-generation electronic devices. Besides low-scale silicon, graphene and MoS2 are key materials to enable such development. It is well known that many of the electrical properties of such materials are strongly influenced by the interface thin-film layers, that in cases can control and tailor the performance of a device. In our Lab we aim to study how the synthesis, processing, and customisation of such interface layer can provide routes for device improvement.
This work is carried out in collaboration with Prof Jamie Warner and Prof Harish Bhaskaran.